Mythili, P; Babita, Jose R; Jimson, Mathew(Springer, January 6, 2009)
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Abstract:
The demand for new telecommunication services
requiring higher capacities, data rates and different operating
modes have motivated the development of new
generation multi-standard wireless transceivers. In multistandard
design, sigma-delta based ADC is one of the most
popular choices. To this end, in this paper we present
cascaded 2-2-2 reconfigurable sigma-delta modulator that
can handle GSM, WCDMA and WLAN standards. The
modulator makes use of a low-distortion swing suppression
topology which is highly suitable for wide band applications.
In GSM mode, only the first stage (2nd order Σ-Δ
ADC) is used to achieve a peak SNDR of 88dB with oversampling
ratio of 160 for a bandwidth of 200KHz and for
WCDMA mode a 2-2 cascaded structure (4th order) is
turned on with 1-bit in the first stage and 2-bit in the second
stage to achieve 74 dB peak SNDR with over-sampling
ratio of 16 for a bandwidth of 2MHz. Finally, a 2-2-2
cascaded MASH architecture with 4-bit in the last stage is
proposed to achieve a peak SNDR of 58dB for WLAN for a
bandwidth of 20MHz. The novelty lies in the fact that
unused blocks of second and third stages can be made
inactive to achieve low power consumption. The modulator
is designed in TSMC 0.18um CMOS technology and
operates at 1.8 supply voltage